Hollywood/IRQs

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IRQs
Hollywood Registers
Access
BroadwayPartial
StarletFull
Registers
Address0x0d000030
AHB Mirror0x0d800030
Length0x30
Access size32 bits
Byte orderBig Endian
IRQs
Broadway14
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The Hollywood chipset includes a simple dual interrupt controller capable of routing up to 32 interrupt sources to either the Starlet, the PowerPC, or both. Each CPU has an independent pair of control registers. There are also a number of registers for interrupt sources that appear to be unused on retail hardware.

IRQs are delivered to an interrupt vector table at the beginning of SRAM.

IRQ sources

IRQ Description
0 Starlet Timer
1 NAND Interface
2 AES Engine
3 SHA-1 Engine
4 USB Host Controller (EHCI)
5 USB Host Controller (OHCI0)
6 USB Host Controller (OHCI1)
7 SD Host Controller
8 802.11 Wireless
9 Unknown
10 Hollywood GPIOs (Broadway)
11 Hollywood GPIOs (Starlet)
12-14 Unknown
15 Unknown, but used by MIOS
16 Unknown
17 Reset button
18 Drive Interface (DI)
19 Unknown (vWii only)
20-29 Reserved
30 IPC (Broadway)
31 IPC (Starlet)

Register list

Hollywood Interrupt Controller
Address Bits Name Description
0x0d800030 32 HW_PPCIRQFLAG Broadway IRQ Flags
0x0d800034 32 HW_PPCIRQMASK Broadway IRQ Mask
0x0d800038 32 HW_ARMIRQFLAG Starlet IRQ Flags
0x0d80003c 32 HW_ARMIRQMASK Starlet IRQ Mask
0x0d800040 32 HW_ARMFIQMASK Starlet FIQ Mask
0x0d800044 32 HW_IOPINTPPC Unknown
0x0d800048 32 HW_WDGINTSTS Watchdog Interrupt Flags
0x0d80004c 32 HW_WDGCFG Watchdog Configuration
0x0d800050 32 HW_DMAADRINTSTS Unknown
0x0d800054 32 HW_CPUADRINTSTS Unknown
0x0d800058 32 HW_DBGINTSTS Debug Interrupt Flags
0x0d80005c 32 HW_DBGINTEN Debug Interrupt Mask

Register descriptions

HW_PPCIRQFLAG (0x0d800030)
  310
Access R/Z

This register contains the 32 IRQ flag bits for the Broadway. These are set by the hardware. To clear a flag, write 1 to it.


HW_PPCIRQMASK (0x0d800034)
  310
Access R/W

This register contains the 32 IRQ mask bits for the Broadway. If a bit is set, then the corresponding flag bit will cause Processor Interface IRQ #14 to be generated.


HW_ARMIRQFLAG (0x0d800038)
  310
Access R/Z

This register contains the 32 IRQ flag bits for the Starlet. These are set by the hardware. To clear a flag, write 1 to it.


HW_ARMIRQMASK (0x0d80003c)
  310
Access R/W

This register contains the 32 IRQ mask bits for the Starlet. If a bit is set, then the corresponding flag bit will cause the ARM IRQ to be asserted.