Line 51:
Line 51:
}}
}}
−
{{reg16 | MI_INTMASK | addr = 0x0C00401C | fields = 6 |
+
{{reg16 | MI_IRQMASK | addr = 0x0C00401C | fields = 6 |
|11 |1 |1 |1 |1 |1 |
|11 |1 |1 |1 |1 |1 |
|U |?/W |?/W |?/W |?/W |?/W |
|U |?/W |?/W |?/W |?/W |?/W |
Line 60:
Line 60:
|ChAll|When set, all MI interrupts are enabled.
|ChAll|When set, all MI interrupts are enabled.
}}
}}
−
{{reg16 | MI_INTFLAG | addr = 0x0C00401E | fields = 6 |
+
{{reg16 | MI_IRQFLAG | addr = 0x0C00401E | fields = 6 |
|11 |1 |1 |1 |1 |1 |
|11 |1 |1 |1 |1 |1 |
|U |R/W |R/W |R/W |R/W |R/W |
|U |R/W |R/W |R/W |R/W |R/W |