Line 57:
Line 57:
This is a general purpose 32-bit register that can be freely read/written by both CPUs. It is usually set by the Starlet and read by the Broadway, though this is not a requirement.
This is a general purpose 32-bit register that can be freely read/written by both CPUs. It is usually set by the Starlet and read by the Broadway, though this is not a requirement.
----
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−
{{reg32 | HW_IPC_ARMCTRL | addr = 0x0d800004 | hifields = 1 | lofields = 7 |
+
{{reg32 | HW_IPC_ARMCTRL | addr = 0x0d80000c | hifields = 1 | lofields = 7 |
|16|
|16|
|U|
|U|