In memory of Ben “bushing” Byer, who passed away on Monday, February 8th, 2016.

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|A1|Send first address byte (typ. column address low)
 
|A1|Send first address byte (typ. column address low)
 
|COMMAND|8-bit NAND command
 
|COMMAND|8-bit NAND command
|WAIT|Wait for R/B to go high between address and data phases (wait for read/write/erase){{check}}
+
|WAIT|Wait for R/B to go high between address and data phases (wait for read/write/erase/reset)
|WR|Transfer data to the NAND chip{{check}}
+
|WR|Transfer data to the NAND chip
|RD|Transfer data from the NAND chip{{check}}
+
|RD|Transfer data from the NAND chip
|ECC|Calculate ECC or transfer ECC data or ?? {{check}}
+
|ECC|Calculate ECC or ?? {{check}}
 
|DMALEN|Number of bytes to transfer
 
|DMALEN|Number of bytes to transfer
 
}}
 
}}
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----
 
----
 
{{regsimple | NAND_DATABUF | addr = 0x0d010010 | bits = 32 | access = R/W }}
 
{{regsimple | NAND_DATABUF | addr = 0x0d010010 | bits = 32 | access = R/W }}
This register contains the DMA address of the page data buffer (0x800 bytes)
+
This register contains the DMA address of the page data buffer (0x800 bytes).
 +
If the spare data is being written alone (such as using a RANDOM DATA IN command with DMALEN=0x40), this points to it instead. Generally speaking, the first 0x800 bytes of data go here, whatever they may be.
 
----
 
----
 
{{regsimple | NAND_ECCBUF | addr = 0x0d010014 | bits = 32 | access = R/W }}
 
{{regsimple | NAND_ECCBUF | addr = 0x0d010014 | bits = 32 | access = R/W }}
 
This register contains the DMA address of the spare and ECC data buffer (0x40 spare bytes + 0x10 bytes of hardware-calculated ECC syndrome).
 
This register contains the DMA address of the spare and ECC data buffer (0x40 spare bytes + 0x10 bytes of hardware-calculated ECC syndrome).
 +
The hardware-calculated ECC is written to the address in this register XOR 0x40.
 
----
 
----
 
{{regsimple | NAND_UNK | addr = 0x0d010018 | bits = 32 | access = R/W }}
 
{{regsimple | NAND_UNK | addr = 0x0d010018 | bits = 32 | access = R/W }}
 
This register has an unknown function; boot2 writes 1 to it when reloading to a new IOS.
 
This register has an unknown function; boot2 writes 1 to it when reloading to a new IOS.

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