Line 17:
Line 17:
{{reglist|EXI}}
{{reglist|EXI}}
{{rla|0x0d806800|32|EXI_CSR|EXI Channel 0 Parameter Register (Status?)}}
{{rla|0x0d806800|32|EXI_CSR|EXI Channel 0 Parameter Register (Status?)}}
−
{{rla|0x0d806800|32|EXI_MAR|EXI Channel 0 DMA Start Address}}
+
{{rla|0x0d806804|32|EXI_MAR|EXI Channel 0 DMA Start Address}}
−
{{rla|0x0d806800|32|EXI_LENGTH|EXI EXI Channel 0 DMA Transfer Length}}
+
{{rla|0x0d806808|32|EXI_LENGTH|EXI EXI Channel 0 DMA Transfer Length}}
−
{{rla|0x0d806800|32|EXI_CR|EXI Channel 0 Control Register}}
+
{{rla|0x0d80680c|32|EXI_CR|EXI Channel 0 Control Register}}
{{rla|0x0d806810|32|EXI_DATA|EXI Channel 0 Immediate Data}}
{{rla|0x0d806810|32|EXI_DATA|EXI Channel 0 Immediate Data}}
{{rla|0x0d806814|32|EXI_CSR|EXI Channel 1 Parameter Register (Status?)}}
{{rla|0x0d806814|32|EXI_CSR|EXI Channel 1 Parameter Register (Status?)}}