Template:Reg32
		
		
		
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| REG_FOO (0xADDRESS) | ||||||||||||||||
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | 
| Field | B31 | B30 | B29 | B28 | B27 | B26 | B25 | B24 | B23 | B22 | B21 | B20 | B19 | B18 | B17 | B16 | 
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | 
| Field | B15 | B14 | B13 | B12 | B11 | B10 | B9 | B8 | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 | 
Usage
Use Template:reg8 for 8-bit registers. Make sure that the bit sizes add up and that your field count is correct. Fields with no name show up in dark grey.
{{reg8 | MAGIC_REGISTER | addr = 0x1337 | fields = 4
|7    !6    !5    !4    !3    !2    !1    !0    ! Bit
|3                |1    |1    |3                | Size
|U                |R    |R    |W                | Access
|                 |FOO  |BAR  |QUUX             | Name
}}
Gives:
| MAGIC_REGISTER (0x1337) | ||||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | U | R | R | W | ||||
| Field | FOO | BAR | QUUX | |||||
You can also omit some informational parts and collapse the layout; the result is the same:
{{User:Marcan/BitTest | MAGIC_REGISTER | addr = 0x1337 | fields = 4 |
|3 |1   |1   |3    |
|U |R   |R   |W    |
|  |FOO |BAR |QUUX |
}}
Gives:
| MAGIC_REGISTER (0x1337) | ||||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | U | R | R | W | ||||
| Field | FOO | BAR | QUUX | |||||
Use Template:reg16 for 16-bit registers:
{{reg16 | MAGIC_REGISTER | addr = 0x1337 | fields = 5 |
|3 |1   |1   |5    |6        |
|U |R   |R   |W    |W        |
|  |FOO |BAR |QUUX |LEETNESS |
|}}
Gives:
| MAGIC_REGISTER (0x1337) | ||||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | U | R | R | W | W | |||||||||||
| Field | FOO | BAR | QUUX | LEETNESS | ||||||||||||
Use Template:reg24 for 24-bit registers:
{{reg24 | MAGIC_REGISTER | addr = 0x1337 | fields = 5 |
|7 |1   |1   |5    |10        |
|U |R   |R   |W    |W        |
|  |FOO |BAR |QUUX |LEETNESS |
|}}
Gives:
| MAGIC_REGISTER (0x1337) | ||||||||||||||||||||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | U | R | R | W | W | |||||||||||||||||||
| Field | FOO | BAR | QUUX | LEETNESS | ||||||||||||||||||||
For 32-bit registers, the layout (and the template parameters) are split into two 16-bit halves:
{{reg32 | MAGIC_REGISTER | addr = 0x1337 | hifields = 5 | lofields = 6
|31  !30  !29  !28  !27  !26  !25  !24  !23  !22  !21  !20  !19  !18  !17  !16  ! Bit
|3             |1   |1   |5                       |6                            | Size
|U             |R   |R   |W                       |W                            | Access
|              |FOO |BAR |QUUX                    |LEETNESS                     | Name
|15  !14  !13  !12  !11  !10  !9   !8   !7   !6   !5   !4   !3   !2   !1   !0   ! Bit
|1   |2        |2        |8                                      |2        |1   | Size
|D   |EA       |DB       |EE                                     |F        |?   | Access
|!   |FOO2     |BAR2     |                                       |QUUX     |EVIL| Name
}}
Or:
{{reg32 | MAGIC_REGISTER | addr = 0x1337 | hifields = 5 | lofields = 6 |
|3 |1   |1   |5    |6        |
|U |R   |R   |W    |W        |
|  |FOO |BAR |QUUX |LEETNESS ||
|1 |2    |2    |8     |2    |    1 |
|D |EA   |DB   |EE    |F    |    ? | 
|! |FOO2 |BAR2 |      |QUUX | EVIL |
}}
Both give:
| MAGIC_REGISTER (0x1337) | ||||||||||||||||
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | U | R | R | W | W | |||||||||||
| Field | FOO | BAR | QUUX | LEETNESS | ||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | D | EA | DB | EE | F | ? | ||||||||||
| Field | ! | FOO2 | BAR2 | QUUX | EVIL | |||||||||||