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[[File:AVE-RVL.jpg]]
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The A/V encoder is located on the underside of the Wii main board; it is communicated with via I2C.
The A/V encoder is located on the underside of the Wii main board; it is communicated with via I2C.
See http://www.gc-linux.org/wiki/AVE-RVL for additional information.
See http://www.gc-linux.org/wiki/AVE-RVL for additional information.
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In lieu of some actual documentation, here is some sample code to initialize it :)
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==Registers description==
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Here is a more complete description of the registers that can be modified by the software.
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This is heavily based on the analysis and disassemby of some original code, there is therefore still unknown features and the whole description should be subject to caution.
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===Register 00h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x00
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|align="center"|1
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|align="center"|W
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|align="center"|A/V timings ?
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0
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|align="center"|0 = default value, 1 for D-Terminal (?)
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|}
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<br>
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===Register 01h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x01
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|align="center"|1
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|align="center"|W
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|align="center"|Video Output configuration
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|5
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|align="center"|YUV output (0: disabled 1: enabled)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0-1
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|align="center"|color encoding (0: NTSC, 1:MPAL, 2:PAL, 3:DEBUG ?)
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|}
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YUV output is typically enabled only when a composite video cable is connected.
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<br>
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===Register 02h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x02
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|align="center"|1
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|align="center"|W
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|align="center"|Vertical blanking interval (VBI) control ?
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|2
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|align="center"|unknown (1: default value, 0 for D-Terminal ?)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|1
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|align="center"|unknown (1: default value, 0 for D-Terminal ?)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0
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|align="center"|unknown (1: default value, 0 for D-Terminal ?)
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|}
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<br>
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===Register 03h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x03
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|align="center"|1
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|align="center"|W
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|align="center"|Video Trap Filter control (composite video only ?)
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|1
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|align="center"|1: default value, 0: disabled ?
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|}
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<br>
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===Register 04h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x04
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|align="center"|1
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|align="center"|R/W
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|align="center"|A/V output control
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|1
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|align="center"|1: enabled, 0: disabled
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|}
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A/V output is typically disabled during register initialization.
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<br>
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===Registers 05h & 06h ===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x05
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|align="center"|2
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|align="center"|W
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|align="center"|[http://en.wikipedia.org/wiki/CGMS-A CGMS] protection ?
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|8-15
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|2-5
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0-1
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|align="center"|unknown (0: default value)
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|}
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<br>
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===Registers 08h & 09h ===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x08
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|align="center"|2
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|align="center"|W
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|align="center"|[http://en.wikipedia.org/wiki/Widescreen_signaling WSS] (Widescreen signaling) ?
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|11-13
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|8-10
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|4-7
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0-3
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|align="center"|unknown (0: default value)
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|}
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<br>
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===Register 0Ah===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x0A
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|align="center"|1
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|align="center"|W
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|align="center"|RGB color output control (overdrive ?)
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|1-7
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|align="center"|unknown (1: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0
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|align="center"|0: disabled, 1: enabled
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|}
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This is apparently only enabled in DEBUG mode.
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<br>
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===Registers 10h - 30h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x10-0x30
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|align="center"|33
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|align="center"|r/W
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|align="center"|Gamma correction coefficients
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0-263
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|align="center"|unknown
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|}
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<br>
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===Registers 40h - 59h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x40-0x59
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|align="center"|26
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|align="center"|r/W
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|align="center"|Macrovision code
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0-207
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|align="center"|unknown
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|}
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<br>
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===Register 65h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x65
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|align="center"|1
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|align="center"|W
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|align="center"|color DAC control (oversampling ?)
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0
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|align="center"|unknown (1: default value)
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|}
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<br>
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===Register 6Ah===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x6A
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|align="center"|1
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|align="center"|W
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|align="center"|Unknown (CCSEL ?)
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0
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|align="center"|unknown (1: default value)
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|}
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<br>
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===Register 6Eh===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x6E
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|align="center"|1
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|align="center"|W
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|align="center"|RGB output filter
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0
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|align="center"|1:enabled, 0: disabled
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|}
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This is typically enabled when the video mode is set to EURGB60 (5).
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Setting this to zero results in red saturated image when using RGB video cable.
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Still need confirmation if this happens in 576i (PAL 50Hz) mode as well.
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Maybe this is used to select between S-Video (NTSC) & RGB (PAL60) output when the video output is 60hz.
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<br>
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===Registers 71h & 72h===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x71
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|align="center"|2
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|align="center"|W
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|align="center"|Audio stereo output control
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|8-15
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|align="center"|right volume ? (default value is 0x8e, 0x71 for d-Terminal ?)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0-7
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|align="center"|left volume ? (default value is 0x8e, 0x71 for d-Terminal ?)
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|}
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<br>
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===Registers 7Ah - 7Dh ===
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{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|address
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!align="center"|size
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!align="center"|read/write
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0x7A
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|align="center"|4
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|align="center"|W
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|align="center"|[http://en.wikipedia.org/wiki/Closed_captioning Closed Captioning] control ?
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|}
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<br>
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{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1"
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!align="center"|bit(s)
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!align="center"|description
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|24-30
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|16-22
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|8-14
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|align="center"|unknown (0: default value)
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|- style="color:black;background-color:#f0f0f0;" border="1"
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|align="center"|0-6
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|align="center"|unknown (0: default value)
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|}
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<br>
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==Sample Code==
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Here is some sample code to initialize the A/V encoder :)
<source lang="c">
<source lang="c">
Line 35:
Line 401:
#endif
#endif
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// hardcoded VI init states -- these were obtained by dumping the register space after it was configured by a game in each mode
+
// hardcoded VI init states -- these were obtained by dumping the register space after it was configured by
+
+
a game in each mode
static const u16 VIDEO_Mode640X480NtsciYUV16[64] = {
static const u16 VIDEO_Mode640X480NtsciYUV16[64] = {
0x0F06, 0x0001, 0x4769, 0x01AD, 0x02EA, 0x5140, 0x0003, 0x0018,
0x0F06, 0x0001, 0x4769, 0x01AD, 0x02EA, 0x5140, 0x0003, 0x0018,
Line 127:
Line 495:
VI_debug("VI dump:\n");
VI_debug("VI dump:\n");
for(Counter=0; Counter<32; Counter++)
for(Counter=0; Counter<32; Counter++)
−
printf("%02x: %04x %04x,\n", Counter*4, read16(MEM_VIDEO_BASE + Counter*4), read16(MEM_VIDEO_BASE + Counter*4+2));
+
printf("%02x: %04x %04x,\n", Counter*4, read16(MEM_VIDEO_BASE + Counter*4),
+
+
read16(MEM_VIDEO_BASE + Counter*4+2));
printf("---\n");
printf("---\n");
Line 414:
Line 784:
}
}
</source>
</source>
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+
== Chip Picture ==
+
[[File:AVE-RVL.jpg]]