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12,609 bytes added ,  18:25, 29 January 2010
added description of A/V registers
Line 1: Line 1: −
[[File:AVE-RVL.jpg]]
  −
   
The A/V encoder is located on the underside of the Wii main board; it is communicated with via I2C.
 
The A/V encoder is located on the underside of the Wii main board; it is communicated with via I2C.
    
See http://www.gc-linux.org/wiki/AVE-RVL for additional information.
 
See http://www.gc-linux.org/wiki/AVE-RVL for additional information.
   −
In lieu of some actual documentation, here is some sample code to initialize it :)
+
==Registers description==
 +
 
 +
Here is a more complete description of the registers that can be modified by the software.
 +
This is heavily based on the analysis and disassemby of some original code, there is therefore still unknown features and the whole description should be subject to caution.
 +
 
 +
 
 +
===Register 00h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x00
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|A/V timings ?
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0
 +
|align="center"|0 = default value, 1 for D-Terminal (?)
 +
|}
 +
<br>
 +
===Register 01h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x01
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|Video Output configuration
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|5
 +
|align="center"|YUV output (0: disabled 1: enabled)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0-1
 +
|align="center"|color encoding (0: NTSC, 1:MPAL, 2:PAL, 3:DEBUG ?)
 +
|}
 +
YUV output is typically enabled only when a composite video cable is connected.
 +
<br>
 +
===Register 02h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x02
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|Vertical blanking interval (VBI) control ?
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|2
 +
|align="center"|unknown (1: default value, 0 for D-Terminal ?)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|1
 +
|align="center"|unknown (1: default value, 0 for D-Terminal ?)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0
 +
|align="center"|unknown (1: default value, 0 for D-Terminal ?)
 +
|}
 +
<br>
 +
===Register 03h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x03
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|Video Trap Filter control (composite video only ?)
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|1
 +
|align="center"|1: default value, 0: disabled ?
 +
|}
 +
<br>
 +
===Register 04h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x04
 +
|align="center"|1
 +
|align="center"|R/W
 +
|align="center"|A/V output control
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|1
 +
|align="center"|1: enabled, 0: disabled
 +
|}
 +
A/V output is typically disabled during register initialization.
 +
<br>
 +
===Registers 05h & 06h ===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x05
 +
|align="center"|2
 +
|align="center"|W
 +
|align="center"|[http://en.wikipedia.org/wiki/CGMS-A CGMS] protection ?
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|8-15
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|2-5
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0-1
 +
|align="center"|unknown (0: default value)
 +
|}
 +
<br>
 +
===Registers 08h & 09h ===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x08
 +
|align="center"|2
 +
|align="center"|W
 +
|align="center"|[http://en.wikipedia.org/wiki/Widescreen_signaling WSS] (Widescreen signaling) ?
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|11-13
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|8-10
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|4-7
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0-3
 +
|align="center"|unknown (0: default value)
 +
|}
 +
<br>
 +
===Register 0Ah===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x0A
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|RGB color output control (overdrive ?)
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|1-7
 +
|align="center"|unknown (1: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0
 +
|align="center"|0: disabled, 1: enabled
 +
|}
 +
This is apparently only enabled in DEBUG mode.
 +
<br>
 +
===Registers 10h - 30h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x10-0x30
 +
|align="center"|33
 +
|align="center"|r/W
 +
|align="center"|Gamma correction coefficients
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0-263
 +
|align="center"|unknown
 +
|}
 +
<br>
 +
===Registers 40h - 59h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x40-0x59
 +
|align="center"|26
 +
|align="center"|r/W
 +
|align="center"|Macrovision code
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0-207
 +
|align="center"|unknown
 +
|}
 +
<br>
 +
===Register 65h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x65
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|color DAC control (oversampling ?)
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0
 +
|align="center"|unknown (1: default value)
 +
|}
 +
<br>
 +
===Register 6Ah===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x6A
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|Unknown (CCSEL ?)
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0
 +
|align="center"|unknown (1: default value)
 +
|}
 +
<br>
 +
===Register 6Eh===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x6E
 +
|align="center"|1
 +
|align="center"|W
 +
|align="center"|RGB output filter
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0
 +
|align="center"|1:enabled, 0: disabled
 +
|}
 +
This is typically enabled when the video mode is set to EURGB60 (5).
 +
Setting this to zero results in red saturated image when using RGB video cable.
 +
Still need confirmation if this happens in 576i (PAL 50Hz) mode as well.
 +
Maybe this is used to select between S-Video (NTSC) & RGB (PAL60) output when the video output is 60hz.
 +
<br>
 +
===Registers 71h & 72h===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x71
 +
|align="center"|2
 +
|align="center"|W
 +
|align="center"|Audio stereo output control
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|8-15
 +
|align="center"|right volume ? (default value is 0x8e, 0x71 for d-Terminal ?)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0-7
 +
|align="center"|left volume ? (default value is 0x8e, 0x71 for d-Terminal ?)
 +
|}
 +
<br>
 +
===Registers 7Ah - 7Dh ===
 +
{| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"
 +
!align="center"|address
 +
!align="center"|size
 +
!align="center"|read/write
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0x7A
 +
|align="center"|4
 +
|align="center"|W
 +
|align="center"|[http://en.wikipedia.org/wiki/Closed_captioning Closed Captioning] control ?
 +
|}
 +
<br>
 +
{| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0"  border="1"
 +
!align="center"|bit(s)
 +
!align="center"|description
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|24-30
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|16-22
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|8-14
 +
|align="center"|unknown (0: default value)
 +
|- style="color:black;background-color:#f0f0f0;" border="1"
 +
|align="center"|0-6
 +
|align="center"|unknown (0: default value)
 +
|}
 +
<br>
 +
==Sample Code==
 +
Here is some sample code to initialize the A/V encoder :)
    
<source lang="c">
 
<source lang="c">
Line 35: Line 401:  
#endif
 
#endif
   −
// hardcoded VI init states -- these were obtained by dumping the register space after it was configured by a game in each mode
+
// hardcoded VI init states -- these were obtained by dumping the register space after it was configured by  
 +
 
 +
a game in each mode
 
static const u16 VIDEO_Mode640X480NtsciYUV16[64] = {
 
static const u16 VIDEO_Mode640X480NtsciYUV16[64] = {
 
   0x0F06, 0x0001, 0x4769, 0x01AD, 0x02EA, 0x5140, 0x0003, 0x0018,
 
   0x0F06, 0x0001, 0x4769, 0x01AD, 0x02EA, 0x5140, 0x0003, 0x0018,
Line 127: Line 495:  
         VI_debug("VI dump:\n");
 
         VI_debug("VI dump:\n");
 
         for(Counter=0; Counter<32; Counter++)
 
         for(Counter=0; Counter<32; Counter++)
                 printf("%02x: %04x %04x,\n", Counter*4, read16(MEM_VIDEO_BASE + Counter*4), read16(MEM_VIDEO_BASE + Counter*4+2));
+
                 printf("%02x: %04x %04x,\n", Counter*4, read16(MEM_VIDEO_BASE + Counter*4),  
 +
 
 +
read16(MEM_VIDEO_BASE + Counter*4+2));
    
         printf("---\n");
 
         printf("---\n");
Line 414: Line 784:  
}
 
}
 
</source>
 
</source>
 +
 +
== Chip Picture ==
 +
[[File:AVE-RVL.jpg]]
105

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