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{{regdesc
{{regdesc
−|RATE|Sample Rate. Cleared is 32KHz, set is 32KHz. (A change from GC?)
+|RATE|Sample Rate. Cleared is 48KHz, set is 32KHz.
|SCRESET|Sample Counter Reset. Resets AI_AISCNT to 0.
|SCRESET|Sample Counter Reset. Resets AI_AISCNT to 0.
|AIINTVLD|This bit controls whether AIINT is affected by the AI_AIIT register matching AI_AISCNT. Once set, AIINT will hold its last value. If 0, match affects AIINT. If 1, AIINT holds last value.
|AIINTVLD|This bit controls whether AIINT is affected by the AI_AIIT register matching AI_AISCNT. Once set, AIINT will hold its last value. If 0, match affects AIINT. If 1, AIINT holds last value.