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Line 55:
Line 55: − − # MEM2 patches − # r3 contains 0x900007ff (translated base 0x90000000, size 64MB, supervisor/user mode valid) − # r4 contains 0x10000002 (real base 0x10000000) − # r5 contains 0xd00007ff (translated base 0xd0000000, size 64MB, supervisor/user mode valid) − # r6 contains 0x1000002a (real base 0x10000000, guarded, cache-inhibited) − # r7 contains 0x00000000 (no translation) + + + − + − + − + − + + + + + + + + +
→3.0 patch: added details on changes in the MEM2 patches
0x60 7c f5 83 a6 mtspr IBAT2L,r7 # this originally placed r6 into IBAT2L, matching the DBAT entry
0x60 7c f5 83 a6 mtspr IBAT2L,r7 # this originally placed r6 into IBAT2L, matching the DBAT entry
# Because of the above inserted instruction, an mtspr IBAT2U,r5 instruction below the previous instruction is deleted. The next instruction is isync.
# Because of the above inserted instruction, an mtspr IBAT2U,r5 instruction below the previous instruction is deleted. The next instruction is isync.
# MEM2 patch 1
# MEM2 patch 1
# r3 contains 0x900003ff
# r4 contains 0x10000002
# r7 contains 0x00000000
0x3c 7c f1 8b a6 mtspr IC_ADR,r7 # originally r4
0x3c 7c f1 8b a6 mtspr IC_ADR,r7 # originally r4
0x40 7c f0 8b a6 mtspr IC_CSR,r7 # originally r3
0x40 7c f0 8b a6 mtspr IC_CSR,r7 # originally r3
# MEM2 patch 2
# MEM2 patch 2
0x9c 7c f5 8b a6 mtspr IBAT6L,r7
# r3 contains 0x920001ff (translated base 0x92000000, size 16MB, supervisor/user mode valid)
0xa0 7c f4 8b a6 mtspr IBAT6U,r7
# r4 contains 0x12000002 (real base 0x10000000)
0xbc 7c f7 8b a6 mtspr IBAT7L,r7
# r7 contains 0x00000000 (no translation)
0xc0 7c f6 8b a6 mtspr IBAT7U,r7
0x9c 7c f5 8b a6 mtspr IBAT6L,r7 # originally r4
0xa0 7c f4 8b a6 mtspr IBAT6U,r7 # originally r3
# MEM2 patch 3
# r5 contains 0x9300007f (translated base 0x93000000, size 4MB, supervisor/user mode valid)
# r6 contains 0x13000002 (real base 0x13000000)
# r7 contains 0x00000000 (no translation)
0xbc 7c f7 8b a6 mtspr IBAT7L,r7 # originally r6
0xc0 7c f6 8b a6 mtspr IBAT7U,r7 # originally r5
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