Difference between revisions of "Hardware/USB Host Controller"
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| Line 5: | Line 5: | ||
| len = 0x200 | | len = 0x200 | ||
| bits = 32{{check}} | | bits = 32{{check}} | ||
| − | | armirq = | + | | armirq = 6 |
}} | }} | ||
{{Infobox MMIO | {{Infobox MMIO | ||
| Line 13: | Line 13: | ||
| len = 0x200 | | len = 0x200 | ||
| bits = 32{{check}} | | bits = 32{{check}} | ||
| − | | armirq = | + | | armirq = 5 |
}} | }} | ||
{{Infobox MMIO | {{Infobox MMIO | ||
| Line 21: | Line 21: | ||
| len = 0x100 | | len = 0x100 | ||
| bits = 32 | | bits = 32 | ||
| − | | armirq = | + | | armirq = 4 |
}} | }} | ||
Revision as of 15:55, 26 February 2009
| OHCI #1 | |
| Access | |
|---|---|
| Broadway | None |
| Starlet | Full |
| Registers | |
| Base | 0x0d060000 |
| Length | 0x200 |
| Access size | 32[check] bits |
| Byte order | Big Endian |
| OHCI #0 | |
| Access | |
|---|---|
| Broadway | None |
| Starlet | Full |
| Registers | |
| Base | 0x0d050000 |
| Length | 0x200 |
| Access size | 32[check] bits |
| Byte order | Big Endian |
| EHCI | |
| Access | |
|---|---|
| Broadway | None |
| Starlet | Full |
| Registers | |
| Base | 0x0d040000 |
| Length | 0x100 |
| Access size | 32 bits |
| Byte order | Big Endian |