In memory of Ben “bushing” Byer, who passed away on Monday, February 8th, 2016.

Difference between revisions of "Hardware/Drive Interface"

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(New page: {{Infobox MMIO | ppc = Conditional | arm = Full | base = 0x0c006000 | len = 0x40 | bits = 32 | ppcirq = 2 | armirq = unknown{{check}} }} {{hwstub}} {{yagcd}})
 
m (DIIMMBUF, not DIMMBUF)
 
(6 intermediate revisions by 4 users not shown)
Line 2: Line 2:
 
| ppc = Conditional
 
| ppc = Conditional
 
| arm = Full
 
| arm = Full
| base = 0x0c006000
+
| base = 0x0d806000
 
| len = 0x40
 
| len = 0x40
 
| bits = 32
 
| bits = 32
 
| ppcirq = 2
 
| ppcirq = 2
| armirq = unknown{{check}}
+
| hwdirq = 18
 
}}
 
}}
 
{{hwstub}}
 
{{hwstub}}
 
{{yagcd}}
 
{{yagcd}}
 +
{{seealso|:/dev/di}}
 +
{| border="1"
 +
! base      !! function !! offset !! description !! contents/example
 +
|-
 +
|0x0D806000|| DI || looks almost identical to the Gamecube DI interface
 +
|-
 +
||0x0D806000|| DISR || || || DI status register
 +
|-
 +
||0x0D806004|| DICVR || || || DI cover register (status2)
 +
|-
 +
||0x0D806008|| DICMDBUF0 || || || DI command buffer 0
 +
|-
 +
||0x0D80600C|| DICMDBUF1 || || || DI command buffer 1
 +
|-
 +
||0x0D806010|| DICMDBUF2 || || || DI command buffer 2
 +
|-
 +
||0x0D806014|| DIMAR || || || DI DMA memory address register
 +
|-
 +
||0x0D806018|| DILENGTH || || || DI DMA transfer length register
 +
|-
 +
||0x0D80601C|| DICR || || || DI control register
 +
|-
 +
||0x0D806020|| DIIMMBUF || || || DI immediate data buffer
 +
|-
 +
||0x0D806024|| DICFG || || || DI configuration register
 +
|}

Latest revision as of 21:36, 31 August 2019

Drive Interface
Access
BroadwayConditional
StarletFull
Registers
Base0x0d806000
Length0x40
Access size32 bits
Byte orderBig Endian
IRQs
Broadway2
Hollywood18
This box: view  talk  edit
See also: /dev/di
base function offset description contents/example
0x0D806000 DI looks almost identical to the Gamecube DI interface
0x0D806000 DISR DI status register
0x0D806004 DICVR DI cover register (status2)
0x0D806008 DICMDBUF0 DI command buffer 0
0x0D80600C DICMDBUF1 DI command buffer 1
0x0D806010 DICMDBUF2 DI command buffer 2
0x0D806014 DIMAR DI DMA memory address register
0x0D806018 DILENGTH DI DMA transfer length register
0x0D80601C DICR DI control register
0x0D806020 DIIMMBUF DI immediate data buffer
0x0D806024 DICFG DI configuration register