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add some clocking regs
{{regdesc
|BOOT0|Disable boot0 mapping to either x'fffe_0000 or x'ffff_0000 depending on HW_MEMMIRR
}}
 
{{reg32 | HW_CLOCKS | addr = 0x0d800190 | hifields = 1 | lofields = 2 |
|16 |
|? |
| ||
|15 |1 |
|?|R/W? |
| |FX|
}}
This register is involved in some sort of clocking.
{{regdesc
|FX|Unknown, but IOS calls this "FX".
}}
 
{{reg32 | HW_ACRPLLSYS | addr = 0x0d8001b0 | hifields = 2 | lofields = 1 |
|9 |7 |
|R/W?| ? |
|clk_0|||
|16 |
|? |
| ||
}}
This register is involved in some sort of clocking.
{{regdesc
|FX|Unknown, but IOS calls this "clk_0".
}}
 
{{reg32 | HW_ACRPLLSYSEXT | addr = 0x0d8001b4 | hifields = 1 | lofields = 2 |
|16 |
|? |
| ||
|7 |9 |
||R/W?|
||clk_1||
}}
This register is involved in some sort of clocking.
{{regdesc
|FX|Unknown, but IOS calls this "clk_1".
}}

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