Line 125: |
Line 125: |
| |} | | |} |
| A/V output is typically disabled during register initialization. | | A/V output is typically disabled during register initialization. |
− | <br> | + | <br> |
| + | |
| ===Registers 05h & 06h === | | ===Registers 05h & 06h === |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
Line 152: |
Line 153: |
| |align="center"|unknown (0: default value) | | |align="center"|unknown (0: default value) |
| |} | | |} |
− | <br> | + | <br> |
| + | |
| ===Registers 08h & 09h === | | ===Registers 08h & 09h === |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
Line 182: |
Line 184: |
| |align="center"|unknown (0: default value) | | |align="center"|unknown (0: default value) |
| |} | | |} |
− | <br> | + | <br> |
| + | |
| ===Register 0Ah=== | | ===Register 0Ah=== |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
Line 207: |
Line 210: |
| |} | | |} |
| This is apparently only enabled in DEBUG mode. | | This is apparently only enabled in DEBUG mode. |
− | <br> | + | <br> |
| + | |
| ===Registers 10h - 30h=== | | ===Registers 10h - 30h=== |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
Line 249: |
Line 253: |
| |align="center"|0-207 | | |align="center"|0-207 |
| |align="center"|unknown | | |align="center"|unknown |
| + | |} |
| + | <br> |
| + | |
| + | ===Register 62h=== |
| + | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
| + | !align="center"|address |
| + | !align="center"|size |
| + | !align="center"|read/write |
| + | !align="center"|description |
| + | |- style="color:black;background-color:#f0f0f0;" border="1" |
| + | |align="center"|0x62 |
| + | |align="center"|1 |
| + | |align="center"|W |
| + | |align="center"|RGB switch control |
| + | |} |
| + | <br> |
| + | {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" |
| + | !align="center"|bit(s) |
| + | !align="center"|description |
| + | |- style="color:black;background-color:#f0f0f0;" border="1" |
| + | |align="center"|0 |
| + | |align="center"|1:swap blue & red signals, 0: normal |
| |} | | |} |
| <br> | | <br> |
Line 273: |
Line 299: |
| |} | | |} |
| <br> | | <br> |
| + | |
| + | ===Register 67h=== |
| + | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
| + | !align="center"|address |
| + | !align="center"|size |
| + | !align="center"|read/write |
| + | !align="center"|description |
| + | |- style="color:black;background-color:#f0f0f0;" border="1" |
| + | |align="center"|0x67 |
| + | |align="center"|1 |
| + | |align="center"|W |
| + | |align="center"|Color Test |
| + | |} |
| + | <br> |
| + | {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" |
| + | !align="center"|bit(s) |
| + | !align="center"|description |
| + | |- style="color:black;background-color:#f0f0f0;" border="1" |
| + | |align="center"|0 |
| + | |align="center"|1:display color test pattern, 0: normal |
| + | |} |
| + | <br> |
| + | |
| ===Register 6Ah=== | | ===Register 6Ah=== |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
Line 294: |
Line 343: |
| |} | | |} |
| <br> | | <br> |
| + | |
| + | ===Register 6Dh=== |
| + | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
| + | !align="center"|address |
| + | !align="center"|size |
| + | !align="center"|read/write |
| + | !align="center"|description |
| + | |- style="color:black;background-color:#f0f0f0;" border="1" |
| + | |align="center"|0x6D |
| + | |align="center"|1 |
| + | |align="center"|W |
| + | |align="center"|Audio mute control |
| + | |} |
| + | <br> |
| + | {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" |
| + | !align="center"|bit(s) |
| + | !align="center"|description |
| + | |- style="color:black;background-color:#f0f0f0;" border="1" |
| + | |align="center"|0 |
| + | |align="center"|1:enabled, 0: disabled |
| + | |} |
| + | <br> |
| + | |
| ===Register 6Eh=== | | ===Register 6Eh=== |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
Line 319: |
Line 391: |
| Maybe this is used to select between S-Video (NTSC) & RGB (PAL60) output when the video output is 60hz. | | Maybe this is used to select between S-Video (NTSC) & RGB (PAL60) output when the video output is 60hz. |
| <br> | | <br> |
| + | |
| ===Registers 71h & 72h=== | | ===Registers 71h & 72h=== |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |
Line 343: |
Line 416: |
| |} | | |} |
| <br> | | <br> |
| + | |
| ===Registers 7Ah - 7Dh === | | ===Registers 7Ah - 7Dh === |
| {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" | | {| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1" |