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26,157 bytes added ,  11:41, 8 February 2010
See http://www.gc-linux.org/wiki/AVE-RVL for additional information.
In lieu ==Registers description== Here is a more complete description of the registers that can be modified by the software.This is heavily based on the disassembly and analysis of some actual documentationoriginal code with help of left symbols, there is therefore still unknown features and the whole description should be handled with caution.  ===Register 00h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x00|align="center"|1|align="center"|W|align="center"|A/V timings ?|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|0 = default value, 1 for D-Terminal (?)|}<br> ===Register 01h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x01|align="center"|1|align="center"|W|align="center"|Video Output configuration|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|5|align="center"|YUV output (0: disabled 1: enabled)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0-1|align="center"|color encoding (0: NTSC, 1:MPAL, 2:PAL, 3:DEBUG ?)|}YUV output is typically enabled only when component video cable is detected.<br> <br> ===Register 02h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x02|align="center"|1|align="center"|W|align="center"|Vertical blanking interval (VBI) control ?|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|2|align="center"|unknown (1: default value, 0 for D-Terminal ?)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|1|align="center"|unknown (1: default value, 0 for D-Terminal ?)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (1: default value, 0 for D-Terminal ?)|}<br> ===Register 03h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x03|align="center"|1|align="center"|W|align="center"|Composite Video Trap Filter control|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|1|align="center"|1: enabled, 0: disabled|}<br>A Trap filter is generally used to improve Luma/Chroma separation in the composite video signal. When disabled, the video signal is unfiltered, which sometimes produces visual artefacts such as color bleeding. This register does not seem to affect RGB, S-Video or YUV output. ===Register 04h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x04|align="center"|1|align="center"|R/W|align="center"|A/V output control|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|1|align="center"|1: enabled, 0: disabled|}A/V output is typically disabled during register initialization.<br><br> ===Registers 05h & 06h ==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x05|align="center"|2|align="center"|W|align="center"|[http://en.wikipedia.org/wiki/CGMS-A CGMS] protection ?|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|8-15|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|2-5|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0-1|align="center"|unknown (0: default value)|}<br>===Registers 08h & 09h ==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x08|align="center"|2|align="center"|W|align="center"|[http://en.wikipedia.org/wiki/Widescreen_signaling WSS] (Widescreen signaling) ?|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|11-13|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|8-10|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|4-7|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0-3|align="center"|unknown (0: default value)|}<br>===Register 0Ah==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x0A|align="center"|1|align="center"|W|align="center"|RGB color output control (overdrive ?)|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|1-7|align="center"|unknown (1: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|0: disabled, 1: enabled|}This is apparently only enabled in DEBUG mode (Reg $1 = 3).<br><br> ===Registers 10h - 30h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x10-0x30|align="center"|33|align="center"|r/W|align="center"|[http://en.wikipedia.org/wiki/Gamma_correction Gamma] coefficients|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|byte(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0-32|align="center"|See coefficients table below (default is gamma 1.0) |}<br><source lang="c">/* Wii A/V Encoder gamma coefficients */ const u8 gamma_coeffs[][33] ={ /* GM_0_0 */ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00  }, /* GM_0_1 */ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x03, 0x97, 0x3B, 0x49, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x80, 0x1B, 0x80, 0xEB, 0x00 }, /* GM_0_2 */ { 0x00, 0x00, 0x00, 0x28, 0x00, 0x5A, 0x02, 0xDB, 0x0D, 0x8D, 0x30, 0x49, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x10, 0x00, 0x10, 0x40, 0x11, 0x00, 0x18, 0x80, 0x42, 0x00, 0xEB, 0x00 }, /* GM_0_3 */ { 0x00, 0x00, 0x00, 0x7A, 0x02, 0x3C, 0x07, 0x6D, 0x12, 0x9C, 0x27, 0x24, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x10, 0x00, 0x10, 0xC0, 0x15, 0x80, 0x29, 0x00, 0x62, 0x00, 0xEB, 0x00 }, /* GM_0_4 */ { 0x00, 0x4E, 0x01, 0x99, 0x05, 0x2D, 0x0B, 0x24, 0x14, 0x29, 0x20, 0xA4, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x00, 0x10, 0x10, 0x40, 0x12, 0xC0, 0x1D, 0xC0, 0x3B, 0x00, 0x78, 0xC0, 0xEB, 0x00 }, /* GM_0_5 */ { 0x00, 0xEC, 0x03, 0xD7, 0x08, 0x00, 0x0D, 0x9E, 0x14, 0x3E, 0x1B, 0xDB, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x10, 0xC0, 0x16, 0xC0, 0x27, 0xC0, 0x4B, 0x80, 0x89, 0x80, 0xEB, 0x00 }, /* GM_0_6 */ { 0x02, 0x76, 0x06, 0x66, 0x0A, 0x96, 0x0E, 0xF3, 0x13, 0xAC, 0x18, 0x49, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x12, 0x00, 0x1C, 0x00, 0x32, 0x80, 0x59, 0xC0, 0x96, 0x00, 0xEB, 0x00 }, /* GM_0_7 */ { 0x04, 0xEC, 0x08, 0xF5, 0x0C, 0x96, 0x0F, 0xCF, 0x12, 0xC6, 0x15, 0x80, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x14, 0x00, 0x22, 0x00, 0x3C, 0xC0, 0x66, 0x40, 0x9F, 0xC0, 0xEB, 0x00 }, /* GM_0_8 */ { 0x08, 0x00, 0x0B, 0xAE, 0x0E, 0x00, 0x10, 0x30, 0x11, 0xCB, 0x13, 0x49, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x16, 0x80, 0x28, 0xC0, 0x46, 0x80, 0x71, 0x00, 0xA7, 0x80, 0xEB, 0x00 }, /* GM_0_9 */ { 0x0B, 0xB1, 0x0E, 0x14, 0x0F, 0x2D, 0x10, 0x18, 0x10, 0xE5, 0x11, 0x80, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x19, 0x80, 0x2F, 0x80, 0x4F, 0xC0, 0x7A, 0x00, 0xAD, 0xC0, 0xEB, 0x00 }, /* GM_1_0 */ { 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x20, 0x40, 0x60, 0x80, 0xA0, 0xEB, 0x10, 0x00, 0x20, 0x00, 0x40, 0x00, 0x60, 0x00, 0x80, 0x00, 0xA0, 0x00, 0xEB, 0x00 }, /* GM_1_1 */ { 0x14, 0xEC, 0x11, 0xC2, 0x10, 0x78, 0x0F, 0xB6, 0x0F, 0x2F, 0x0E, 0xB6, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x21, 0x00, 0x3C, 0xC0, 0x5F, 0xC0, 0x89, 0x00, 0xB7, 0x80, 0xEB, 0x00 }, /* GM_1_2 */ { 0x19, 0xD8, 0x13, 0x33, 0x10, 0xD2, 0x0F, 0x6D, 0x0E, 0x5E, 0x0D, 0xA4, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x25, 0x00, 0x43, 0x00, 0x66, 0xC0, 0x8F, 0x40, 0xBB, 0x40, 0xEB, 0x00 }, /* GM_1_3 */ { 0x1E, 0xC4, 0x14, 0x7A, 0x11, 0x0F, 0xF, 0x0C, 0x0D, 0xA1, 0x0C, 0xB6, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x29, 0x00, 0x49, 0x00, 0x6D, 0x40, 0x94, 0xC0, 0xBE, 0x80, 0xEB, 0x00 }, /* GM_1_4 */ { 0x24, 0x00, 0x15, 0x70, 0x11, 0x0F, 0x0E, 0xAA, 0x0D, 0x0F, 0x0B, 0xDB, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x2D, 0x40, 0x4E, 0xC0, 0x73, 0x00, 0x99, 0x80, 0xC1, 0x80, 0xEB, 0x00 }, /* GM_1_5 */ { 0x29, 0x3B, 0x16, 0x3D, 0x11, 0x0F, 0x0E, 0x30, 0x0C, 0x7D, 0x0B, 0x24, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x31, 0x80, 0x54, 0x40, 0x78, 0x80, 0x9D, 0xC0, 0xC4, 0x00, 0xEB, 0x00 }, /* GM_1_6 */ { 0x2E, 0x27, 0x17, 0x0A, 0x10, 0xD2, 0x0D, 0xE7, 0x0B, 0xEB, 0x0A, 0x80, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x35, 0x80, 0x59, 0x80, 0x7D, 0x40, 0xA1, 0xC0, 0xC6, 0x40, 0xEB, 0x00 }, /* GM_1_7 */ { 0x33, 0x62, 0x17, 0x5C, 0x10, 0xD2, 0x0D, 0x6D, 0x0B, 0x6D, 0x09, 0xED, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x39, 0xC0, 0x5E, 0x40, 0x82, 0x00, 0xA5, 0x40, 0xC8, 0x40, 0xEB, 0x00 }, /* GM_1_8 */ { 0x38, 0x4E, 0x17, 0xAE, 0x10, 0xB4, 0x0D, 0x0C, 0x0A, 0xF0, 0x09, 0x6D, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x3D, 0xC0, 0x62, 0xC0, 0x86, 0x40, 0xA8, 0x80, 0xCA, 0x00, 0xEB, 0x00 }, /* GM_1_9 */ { 0x3D, 0x3B, 0x18, 0x00, 0x10, 0x5A, 0x0C, 0xC3, 0x0A, 0x72, 0x09, 0x00, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x41, 0xC0, 0x67, 0x40, 0x8A, 0x00, 0xAB, 0x80, 0xCB, 0x80, 0xEB, 0x00 }, /* GM_2_0 */ { 0x41, 0xD8, 0x18, 0x28, 0x10, 0x3C, 0x0C, 0x49, 0x0A, 0x1F, 0x08, 0x92, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x45, 0x80, 0x6B, 0x40, 0x8D, 0xC0, 0xAE, 0x00, 0xCD, 0x00, 0xEB, 0x00 }, /* GM_2_1 */ { 0x46, 0x76, 0x18, 0x51, 0x0F, 0xE1, 0x0C, 0x00, 0x09, 0xB6, 0x08, 0x36, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x49, 0x40, 0x6F, 0x40, 0x91, 0x00, 0xB0, 0x80, 0xCE, 0x40, 0xEB, 0x00 }, /* GM_2_2 */ { 0x4A, 0xC4, 0x18, 0x7A, 0x0F, 0xA5, 0x0B, 0x9E, 0x09, 0x63, 0x07, 0xDB, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x4C, 0xC0, 0x73, 0x00, 0x94, 0x40, 0xB2, 0xC0, 0xCF, 0x80, 0xEB, 0x00 }, /* GM_2_3 */ { 0x4F, 0x13, 0x18, 0x51, 0x0F, 0x69, 0x0B, 0x6D, 0x09, 0x0F, 0x07, 0x80, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x50, 0x40, 0x76, 0x40, 0x97, 0x00, 0xB5, 0x00, 0xD0, 0xC0, 0xEB, 0x00 }, /* GM_2_4 */ { 0x53, 0x13, 0x18, 0x7A, 0x0F, 0x0F, 0x0B, 0x24, 0x08, 0xBC, 0x07, 0x36, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x53, 0x80, 0x79, 0xC0, 0x99, 0xC0, 0xB7, 0x00, 0xD1, 0xC0, 0xEB, 0x00 }, /* GM_2_5 */ { 0x57, 0x13, 0x18, 0x51, 0x0E, 0xF0, 0x0A, 0xC3, 0x08, 0x7D, 0x06, 0xED, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x56, 0xC0, 0x7C, 0xC0, 0x9C, 0x80, 0xB8, 0xC0, 0xD2, 0xC0, 0xEB, 0x00 }, /* GM_2_6 */ { 0x5B, 0x13, 0x18, 0x28, 0x0E, 0x96, 0x0A, 0x92, 0x08, 0x29, 0x06, 0xB6, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x5A, 0x00, 0x7F, 0xC0, 0x9E, 0xC0, 0xBA, 0x80, 0xD3, 0x80, 0xEB, 0x00 }, /* GM_2_7 */ { 0x5E, 0xC4, 0x18, 0x00, 0x0E, 0x78, 0x0A, 0x30, 0x08, 0x00, 0x06, 0x6D, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x5D, 0x00, 0x82, 0x80, 0xA1, 0x40, 0xBC, 0x00, 0xD4, 0x80, 0xEB, 0x00 }, /* GM_2_8 */ { 0x62, 0x76, 0x17, 0xD7, 0x0E, 0x1E, 0x0A, 0x00, 0x07, 0xC1, 0x06, 0x36, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x60, 0x00, 0x85, 0x40, 0xA3, 0x40, 0xBD, 0x80, 0xD5, 0x40, 0xEB, 0x00 }, /* GM_2_9 */ { 0x65, 0xD8, 0x17, 0xAE, 0x0D, 0xE1, 0x09, 0xCF, 0x07, 0x82, 0x06, 0x00, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x62, 0xC0, 0x87, 0xC0, 0xA5, 0x40, 0xBF, 0x00, 0xD6, 0x00, 0xEB, 0x00 }, /* GM_3_0 */ { 0x69, 0x3B, 0x17, 0x85, 0x0D, 0xA5, 0x09, 0x86, 0x07, 0x43, 0x05, 0xDB, 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, 0x10, 0x00, 0x65, 0x80, 0x8A, 0x40, 0xA7, 0x40, 0xC0, 0x40, 0xD6, 0x80, 0xEB, 0x00 }}</source> ===Registers 40h - 59h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x40-0x59|align="center"|26|align="center"|r/W|align="center"|[http://en.wikipedia.org/wiki/Macrovision Macrovision] code|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bytes(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0-25|align="center"|unknown, default is 0xFF|}<br> ===Register 62h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x62|align="center"|1|align="center"|W|align="center"|RGB switch control|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|1:swap blue & red signals, 0: normal|}<br>===Register 63h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x63|align="center"|1|align="center"|?|align="center"|Unknown|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (0: initial value)|}<br>===Register 64h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x64|align="center"|1|align="center"|?|align="center"|Unknown|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (0: initial value)|}<br>===Register 65h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x65|align="center"|1|align="center"|W|align="center"|color DAC control (oversampling ?)|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (1: default value)|}<br>Modifying the default value does seem to have any effect on retail Wii. ===Register 67h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x67|align="center"|1|align="center"|W|align="center"|Color Test|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|1:display color test pattern, 0: normal|}<br>===Register 68h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x68|align="center"|1|align="center"|?|align="center"|Unknown|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (0: initial value)|}<br>===Register 6Ah==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x6A|align="center"|1|align="center"|W|align="center"|Unknown (CCSEL ?)|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (1: default value)|}<br>===Register 6Bh==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x6B|align="center"|1|align="center"|?|align="center"|Unknown|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (0: initial value)|}<br>===Register 6Ch==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x6C|align="center"|1|align="center"|?|align="center"|Unknown|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (0: initial value)|}<br>===Register 6Dh==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x6D|align="center"|1|align="center"|W|align="center"|Audio mute control|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|1:enabled, 0: disabled|}<br> ===Register 6Eh==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x6E|align="center"|1|align="center"|W|align="center"|RGB output filter|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|1:enabled, 0: disabled|}This is typically enabled when the video mode is set to EURGB60 (5).Setting this to zero results in red saturated image when using RGB video cable.Still need confirmation if this happens in 576i (PAL 50Hz) mode as well. Maybe this is used to select between S-Video (NTSC) & RGB (PAL60) output when the video output is 60hz.<br><br> ===Register 70h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x70|align="center"|1|align="center"|?|align="center"|Unknown|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0|align="center"|unknown (0: initial value)|}<br>===Registers 71h & 72h==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x71|align="center"|2|align="center"|W|align="center"|Audio stereo output control|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|8-15|align="center"|right volume ? (default value is 0x8e, 0x71 for d-Terminal ?)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0-7|align="center"|left volume ? (default value is 0x8e, here 0x71 for d-Terminal ?)|}<br> ===Registers 7Ah - 7Dh ==={| style="color:black;background-color:#d0e6f0;" cellpadding="4" cellspacing="0" border="1"!align="center"|address!align="center"|size!align="center"|read/write!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0x7A|align="center"|4|align="center"|W|align="center"|[http://en.wikipedia.org/wiki/Closed_captioning Closed Captioning] control ?|}<br> {| style="color:black;background-color:#bcd3cc;" cellpadding="4" cellspacing="0" border="1" !align="center"|bit(s)!align="center"|description|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|24-30|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|16-22|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|8-14|align="center"|unknown (0: default value)|- style="color:black;background-color:#f0f0f0;" border="1"|align="center"|0-6|align="center"|unknown (0: default value)|}<br> ==Sample Code==Here is some sample code to initialize it the A/V encoder :)
<source lang="c">
#endif
// hardcoded VI init states -- these were obtained by dumping the register space after it was configured by  a game in each mode
static const u16 VIDEO_Mode640X480NtsciYUV16[64] = {
0x0F06, 0x0001, 0x4769, 0x01AD, 0x02EA, 0x5140, 0x0003, 0x0018,
VI_debug("VI dump:\n");
for(Counter=0; Counter<32; Counter++)
printf("%02x: %04x %04x,\n", Counter*4, read16(MEM_VIDEO_BASE + Counter*4),  read16(MEM_VIDEO_BASE + Counter*4+2));
printf("---\n");
}
</source>
 
== Chip Picture ==
[[File:AVE-RVL.jpg]]
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