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Hardware/GX/Blitting Processor (view source)
Revision as of 09:16, 8 October 2011
, 09:16, 8 October 2011→Vertical filter registers
The Blitting Processor is a component of the Wii's GX subsystem. It is responsible for copying the EFB to the XFB, doing the RGBA->YCbCr conversion and scaling/antialiasing in the process.
The Blitting Processor is a component of the Wii's GX subsystem. It is responsible for copying the EFB to the XFB, doing the RGBA->YCbCr conversion and scaling/antialiasing in the process.
==BP (blitting processor) registers==
== BP (blitting processor) registers ==
The BP registers are accessed by writing a 8-bit value of 0x61 to the FIFO, followed by 32 bit value. This value is a bit weird - the high 8 bits are the register, and the low 24 bits are the register value.
The BP registers are accessed by writing a 8-bit value of 0x61 to the FIFO, followed by 32 bit value. This value is a bit weird - the high 8 bits are the register, and the low 24 bits are the register value.
===EFB source registers===
=== EFB source registers ===
One can specify which part of the EFB is copied to the XFB or texture, using the following BP registers:
One can specify which part of the EFB is copied to the XFB or texture, using the following BP registers:
{{reg24 | GX_BP_EFB_BOXCOORD | addr = 0x49 | fields = 3 |
{{reg24 | GX_BP_EFB_BOXCOORD | addr = 0x49 | fields = 3 |
* 0x4a: width and height-1 of rectangle to copy in EFB (again, unknown packed format)
* 0x4a: width and height-1 of rectangle to copy in EFB (again, unknown packed format)
===XFB destination registers===
=== XFB destination registers ===
The destination of the copy in the XFB is specified by the '''physical''' address of the XFB and the row stride (basically width of row, but no scaling appled).
The destination of the copy in the XFB is specified by the '''physical''' address of the XFB and the row stride (basically width of row, but no scaling appled).
{{regsimple | GX_BP_XFB_ADDR | addr=0x4B | bits=24 | access = R/W}}
{{regsimple | GX_BP_XFB_ADDR | addr=0x4B | bits=24 | access = R/W}}
* 0x4d: Low 10 bits specify row stride of destination.
* 0x4d: Low 10 bits specify row stride of destination.
===Copy control register===
=== Copy control register ===
{{reg24 | GX_BP_COPY_CONTROL | addr = 0x52 | fields = 4 |
{{reg24 | GX_BP_COPY_CONTROL | addr = 0x52 | fields = 4 |
|10|2 |1 | 11|
|10|2 |1 | 11|
{{regdesc
{{regdesc
|Start|Writing both of these bits to 1 will start a copy.
|Start|Writing both of these bits to 1 will start a copy.
|Clr|Enables or disables clearing.
|Clr|Enables or disables clearing of the EFB during the copy.
}}
}}
===Copy filter registers===
=== Copy clear registers ===
If EFB clearing is enabled in GX_BP_COPY_CONTROL, at each copy, the EFB is filled with the values specified by these registers.
{{reg24 | GX_BP_COPY_CLEAR_COLOR_HIGH | addr = 0x4F | fields = 3 |
|8 |8 |8 |
|U |R/W |R/W |
| |Alpha |Red |
}}
* 0x4F: This register defines the alpha and red components of the copy clear color.
{{reg24 | GX_BP_COPY_CLEAR_COLOR_LOW | addr = 0x50 | fields = 3 |
|8 |8 |8 |
|U |R/W |R/W |
| |Green |Blue |
}}
* 0x50: This register defines the green and blue components of the copy clear color.
{{regsimple | GX_BP_COPY_CLEAR_DEPTH | addr=0x51 | bits=24 | access = R/W}}
* 0x51: This register defines the copy clear depth.
A depth value of 0 represents 0.0 in floating-point, and a value of 0xFFFFFF (16777215) represents 1.0 .
So the formula to convert a floating-point depth to a 24-bit depth would be:
* 24_bit_depth = (floating_point_depth * 16777215.0)
Where floating_point_depth is between 0.0 and 1.0, of course.
=== Copy filter registers ===
{{regsimple | GX_BP_FILTER_0 | addr=0x01 | bits=24 | access = R/W}}
{{regsimple | GX_BP_FILTER_1 | addr=0x02 | bits=24 | access = R/W}}
{{regsimple | GX_BP_FILTER_2 | addr=0x03 | bits=24 | access = R/W}}
{{regsimple | GX_BP_FILTER_3 | addr=0x04 | bits=24 | access = R/W}}
Registers 0x01-0x04 are used for tricks like antialiasing. For a plain copy (i.e. no antialiasing) set all for to 0x666666.
Registers 0x01-0x04 are used for tricks like antialiasing. For a plain copy (i.e. no antialiasing) set all for to 0x666666.
===Beginning a copy===
=== Vertical filter registers ===
{{reg24 | GX_BP_VFILTER_0 | addr = 0x53 | fields = 4 |
|6 |6 |6 |6 |
|R/W |R/W |R/W |R/W |
|f3 |f2 |f1 |f0 |
}}
{{reg24 | GX_BP_VFILTER_1 | addr = 0x54 | fields = 4 |
|6 |6 |6 |6 |
|U |R/W |R/W |R/W |
| |f6 |f5 |f4 |
}}
Like the filter registers, these vertical filter registers must be set up properly for you to see anything at all. Default values for no fancy operations are as follows:
{{regdesc
|f0|0x00
|f1|0x00
|f2|0x15
|f3|0x16
|f4|0x15
|f5|0x00
|f6|0x00
}}
== Beginning a copy ==
The following must take place to do a copy:
The following must take place to do a copy:
* Setup clear and z clear registers (optional)
* Setup clear and z clear registers (optional)