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| ===BP (blitting processor) registers=== | | ===BP (blitting processor) registers=== |
| The BP registers are accessed by writing a 8-bit value of 0x61 to the FIFO, followed by 32 bit value. This value is a bit weird - the high 8 bits are the register, and the low 24 bits are the register value. | | The BP registers are accessed by writing a 8-bit value of 0x61 to the FIFO, followed by 32 bit value. This value is a bit weird - the high 8 bits are the register, and the low 24 bits are the register value. |
| + | ====EFB source registers==== |
| + | One can specify which part of the EFB is copied to the XFB or texture, using the following BP registers: |
| + | * 0x49: coordinates to top left of rectangle in EFB that will be copied (packed format, unknown) |
| + | * 0x4a: width and height-1 of rectangle to copy in EFB (again, unknown packed format) |
| ====Copy filter registers==== | | ====Copy filter registers==== |
| Registers 0x01-0x04 are used for tricks like antialiasing. For a plain copy (i.e. no antialiasing) set all for to 0x666666. | | Registers 0x01-0x04 are used for tricks like antialiasing. For a plain copy (i.e. no antialiasing) set all for to 0x666666. |
| + | |
| ===CP (command processor) registers=== | | ===CP (command processor) registers=== |
| The (internal, there are other CP registers mapped to main memory) CP registers are accessed by writing a 8-bit 0x08 to the FIFO, followed by 8 bits of something and then 32 bits of something. | | The (internal, there are other CP registers mapped to main memory) CP registers are accessed by writing a 8-bit 0x08 to the FIFO, followed by 8 bits of something and then 32 bits of something. |
| ===XF (transform) registers=== | | ===XF (transform) registers=== |
| The XF registers are accessed by first writing an 8-bit number of 0x10 to the FIFO, then a 32 bit value whose lower 16 bits are the address, and the upper 16 bits are the number of addresses to write to - 1. Following is one or more 32 bit datas. | | The XF registers are accessed by first writing an 8-bit number of 0x10 to the FIFO, then a 32 bit value whose lower 16 bits are the address, and the upper 16 bits are the number of addresses to write to - 1. Following is one or more 32 bit datas. |