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{{reg32 | HW_SRNPROT | addr = 0x0d800060 | hifields = 1 | lofields = 8 |
|16 |
|? U |
| ||
|9 |1 |1 |1 |1 |1 |1 |1 |
|? U |R/W|R/W|R/W|R/W|R/W|R/W|R/W|
| |H |SM |U4 |U3 |C |B |A ||
}}
It seems like bits 31-7 cannot be read or written to? {{check}}
{{regdesc
|H|IOPDBGEN; Set [by boot1, BC, others] if HWVER in HW_VERSION is 0|SM|IOUEN; Enables the SRAM mirror at 0xfffe0000 when set|U4|UnknownOH1EN|U3|AHPEN; Set/cleared by syscall 0x54 in IOS58; maybe related to HW_AHBPROT|C|FLAEN (Flash/NAND engine); Explicitly set by boot0/boot1 before using NAND/AES/SHA|B|SHAEN (SHA-1 engine); Explicitly set by boot0/boot1 before using NAND/AES/SHA|A|AESEN (AES engine); Explicitly set by boot0/boot1 before using NAND/AES/SHA
}}
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