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{{rla|0x0d800060|32|HW_SRNPROT|Probably bus control; includes the SRAM bank swap }}
{{rld|0x0d800064|32|HW_AHBPROT|Access control for the PPC to access devices on the AHB ("HW_BUSPROT")}}
{{rld|0x0d800068|32|HW_I2CIOPINTEN}}
{{rld|0x0d80006c|32|HW_I2CIOPINTSTS}}
{{rla|0x0d800070|32|HW_AIPPROT|[[Hardware/EXI|EXI]] PPC enable / control / other; probably related to Flipper interface compatibility}}
{{rla|0x0d800074|32|HW_AIPIOCTRL|Probably related to Flipper interface compatibility/bus control}}
{{rld|0x0d800078|32|HW_VIINTEN}}
{{rld|0x0d80007c|32|HW_VIINTSTS}}
{{rld|0x0d800080|32|HW_USBDBG0|USB-related, unused?|drs=4}}
{{rld|0x0d800084|32|HW_USBDBG1}}
39

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