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{{rld|0x0d800088|32|HW_USBFRCRST}}
{{rld|0x0d80008c|32|HW_USBIOTEST}}
{{rld|0x0d800090|32|HW_ELA_REG_ADDR|Unknown (perhaps test/debug"embedded logic-relatedanalyzer?!")|drs=4}}
{{rld|0x0d800094|32|HW_ELA_REG_DATA}}
{{rld|0x0d800098|32|HW_MEMTSTN}}
{{rld|0x0d8000f8|32|HW_GPIO_STRAPS}}
{{rld|0x0d8000fc|32|HW_GPIO_OWNER}}
{{rld|0x0d800100|32|HW_ARB_CFG_M0|AHB-related registers?|drs=18}}
{{rld|0x0d800104|32|HW_ARB_CFG_M1}}
{{rld|0x0d800108|32|HW_ARB_CFG_M2}}
{{rld|0x0d800148|32|HW_ARB_PCNTCFG}}
{{rld|0x0d80014c|32|HW_ARB_PCNTSTS}}
{{rla|0x0d800180|32|HW_DIFLAGSHW_COMPAT|Some DI stuff and boot code and {{check}}}}
{{rla|0x0d800184|32|HW_UNKFLAGS|{{check}}}}
{{rld|0x0d800188|32|HW_SPARE0|?}}
{{rla|0x0d80018c|32|HW_BOOT0|(HW_SPARE1ACR_SPARE1) Controls boot0 mapping? {{check}}}}
{{rla|0x0d800190|32|HW_CLOCKS|clock stuff?}}
{{rla|0x0d800194|32|HW_RESETS|System resets / power{{check}}}}
{{rld|0x0d800198|32|HW_IFPOWER|set to 0xFFFFFF when Wii wakes up ("interfaces")}}
{{rld|0x0d80019c|32|HW_PLLDR|ClockingPLL/Clock configuration (?)|drs=12}}{{rla|0x0d8001b0|32|HW_PLLSYS|?}}{{rla|0x0d8001b4|32|HW_PLLSYSEXT|Clocking?}}{{rld|0x0d8001b8|32|HW_PLLDSK|Other clocking registers|drs=9?}}
{{rld|0x0d8001bc|32|HW_PLLDDR}}
{{rld|0x0d8001c0|32|HW_PLLDDREXT}}
{{rld|0x0d8001ec|32|HW_OTPCMD|[[Hardware/OTP|OTP]]|drs=2}}
{{rld|0x0d8001f0|32|HW_OTPDATA}}
{{rld|0x0d8001f4|32|HW_DBGCLK|Debug registers (vestigial?)|drs=4}}
{{rld|0x0d8001f8|32|HW_OBSCLKOCTRL}}
{{rld|0x0d8001fc|32|HW_OBSCLKICTRL}}
}}
{{reg32 | HW_DIFLAGS HW_COMPAT| addr = 0x0d800180 | hifields = 4 | lofields = 4 5 ||10|1 |1 |4 ||? |R/W |R/W |? || |DVDVIDEO|PPCBOOT| |||13 11 |1 |2 |1 |1||? |? |R/W? |R/W|?|| |B4|? |? B1 | ||
}}
This register seems to control some aspects of the PowerPC booting and some DI flags.{{check}}
|DVDVIDEO|Disables{{check}} DVD video support when set
|PPCBOOT|needs to be set to allow the PowerPC to read the boot stub.
|Bit 3 B4| unknownPotentially related to the IOSTRCTRL registers?|Bit 2 B1| when clear, disables bit 14 in the PPC IRQ flags
}}

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