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more registers from 100J/121J
{{rld|0x0d800058|32|HW_DBGINTSTS}}
{{rld|0x0d80005c|32|HW_DBGINTEN}}
{{rla|0x0d800060|32|HW_MEMIRR|Memory control / SRAM bank swap("HW_SRNPROT"){{check}}}}{{rld|0x0d800064|32|HW_AHBPROT|Access control for the PPC to access devices on the AHB("HW_BUSPROT")}}{{rla|0x0d800070|32|HW_EXICTRL|[[Hardware/EXI|EXI]] PPC enable / control / other ("HW_AIP_PROT") {{check}}}}{{rld|0x0d800074|32|HW_AIP_IOCTRL|??}}
{{rld|0x0d800080|32|HW_USBDBG0|USB-related, unused?|drs=4}}
{{rld|0x0d800084|32|HW_USBDBG1}}
{{rla|0x0d800180|32|HW_DIFLAGS|Some DI stuff and boot code and {{check}}}}
{{rla|0x0d800184|32|HW_UNKFLAGS|{{check}}}}
{{rld|0x0d800188|32|HW_SPARE0|?}}{{rla|0x0d80018c|32|HW_BOOT0|Maps (HW_SPARE1) Controls boot0 mapping? {{check}}}}
{{rla|0x0d800190|32|HW_CLOCKS|clock stuff?}}
{{rla|0x0d800194|32|HW_RESETS|System resets / power{{check}}}}
{{rld|0x0d800198|32|HW_IFPOWER|set to 0xFFFFFF when Wii wakes up ("interfaces")}}
{{rld|0x0d80019c|32|HW_PLLDR|Clocking?}}
{{rla|0x0d8001b0|32|HW_PLLSYS|?}}
{{rla|0x0d8001b4|32|HW_PLLSYSEXT|Clocking?}}
{{rld|0x0d8001b8|32|HW_PLLDSK|Other clocking registers|drs=9?}}{{rld|0x0d8001bc|32|HW_PLLDDR}}{{rld|0x0d8001c0|32|HW_PLLDDREXT}}{{rld|0x0d8001c4|32|HW_PLLVI}}{{rld|0x0d8001c8|32|HW_PLLVIEXT}}{{rld|0x0d8001cc|32|HW_PLLAI}}{{rld|0x0d8001d0|32|HW_PLLAIEXT}}{{rld|0x0d8001d4|32|HW_PLLUSB}}{{rld|0x0d8001d8|32|HW_PLLUSBEXT}}{{rld|0x0d8001dc|32|HW_SSPOWERHW_IOPWRCTRL|set to 0xFFFFFFF when Wii wakes up ("subsystems")}}{{rld|0x0d8001e0|32|HW_IOSTRCTRL0|More clock registers?|drs=3}}{{rld|0x0d8001e4|32|HW_IOSTRCTRL1}}{{rld|0x0d8001e8|32|HW_CLKSTRCTRL}}
{{rld|0x0d8001ec|32|HW_OTPCMD|[[Hardware/OTP|OTP]]|drs=2}}
{{rld|0x0d8001f0|32|HW_OTPDATA}}

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