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{{rla|0x0d8000d0|32|HW_GPIOB_INTFLAG|GPIO Interrupt Flags (Broadway access)}}

{{rla|0x0d8000d0|32|HW_GPIOB_INTFLAG|GPIO Interrupt Flags (Broadway access)}}

{{rla|0x0d8000d4|32|HW_GPIOB_INTMASK|GPIO Interrupt Masks (Broadway access)}}

{{rla|0x0d8000d4|32|HW_GPIOB_INTMASK|GPIO Interrupt Masks (Broadway access)}}

{{rla|0x0d8000d8|32|HW_GPIOB_INMIR|GPIO Input Mirror (Broadway access)}}

{{rla|0x0d8000d8|32|HW_GPIOB_STRAPS|GPIO Straps (Broadway access)}}

{{rla|0x0d8000dc|32|HW_GPIO_ENABLE|GPIO Enable (Starlet only)}}

{{rla|0x0d8000dc|32|HW_GPIO_ENABLE|GPIO Enable (Starlet only)}}

{{rla|0x0d8000e0|32|HW_GPIO_OUT|GPIO Outputs (Starlet only)}}

{{rla|0x0d8000e0|32|HW_GPIO_OUT|GPIO Outputs (Starlet only)}}

{{rla|0x0d8000f0|32|HW_GPIO_INTFLAG|GPIO Interrupt Flags (Starlet only)}}

{{rla|0x0d8000f0|32|HW_GPIO_INTFLAG|GPIO Interrupt Flags (Starlet only)}}

{{rla|0x0d8000f4|32|HW_GPIO_INTMASK|GPIO Interrupt Masks (Starlet only)}}

{{rla|0x0d8000f4|32|HW_GPIO_INTMASK|GPIO Interrupt Masks (Starlet only)}}

{{rla|0x0d8000f8|32|HW_GPIO_INMIR|GPIO Input Mirror (Starlet only)}}

{{rla|0x0d8000f8|32|HW_GPIO_STRAPS|GPIO Straps (Starlet only)}}

{{rla|0x0d8000fc|32|HW_GPIO_OWNER|GPIO Owner Select (Starlet only)}}

{{rla|0x0d8000fc|32|HW_GPIO_OWNER|GPIO Owner Select (Starlet only)}}

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Only the bits set in this register propagate their interrupts to the master [[Hardware/Hollywood IRQs|Hollywood GPIO interrupt]] (#11). All other pin interrupts are ignored, although the interrupt state can still be queried and cleared in [[#HW_GPIO_INTFLAG|HW_GPIO_INTFLAG]]. Note: Pins configured for Broadway access do not generate Hollywood IRQ #11. Instead, they generate Hollywood IRQ #10. In other words, the IRQ generation logic for #11 is HW_GPIO_INTMASK & HW_GPIO_INTFLAG & ~HW_GPIO_OWNER.

Only the bits set in this register propagate their interrupts to the master [[Hardware/Hollywood IRQs|Hollywood GPIO interrupt]] (#11). All other pin interrupts are ignored, although the interrupt state can still be queried and cleared in [[#HW_GPIO_INTFLAG|HW_GPIO_INTFLAG]]. Note: Pins configured for Broadway access do not generate Hollywood IRQ #11. Instead, they generate Hollywood IRQ #10. In other words, the IRQ generation logic for #11 is HW_GPIO_INTMASK & HW_GPIO_INTFLAG & ~HW_GPIO_OWNER.

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{{regsimple2|HW_GPIO_INMIR|addr=0x0d8000f8|bits=32|split=24|access=R}}

{{regsimple2|HW_GPIO_STRAPS|addr=0x0d8000f8|bits=32|split=24|access=R}}

This register appears to contain the input state at some point in time, possibly power-on or interrupt or something like that. Writes do not seem possible. {{check}}

This register appears to contain the input state at some point in time, possibly power-on or interrupt or something like that. Writes do not seem possible.  

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{{regsimple2|HW_GPIO_OWNER|addr=0x0d8000fc|bits=32|split=24|access=R/W}}

{{regsimple2|HW_GPIO_OWNER|addr=0x0d8000fc|bits=32|split=24|access=R/W}}

{{regsimple2|HW_GPIOB_INTFLAG|addr=0x0d8000d0|bits=32|split=24|access=R/Z}}

{{regsimple2|HW_GPIOB_INTFLAG|addr=0x0d8000d0|bits=32|split=24|access=R/Z}}

{{regsimple2|HW_GPIOB_INTMASK|addr=0x0d8000d4|bits=32|split=24|access=R/W}}

{{regsimple2|HW_GPIOB_INTMASK|addr=0x0d8000d4|bits=32|split=24|access=R/W}}

{{regsimple2|HW_GPIOB_INMIR|addr=0x0d8000d8|bits=32|split=24|access=R}}

{{regsimple2|HW_GPIOB_STRAPS|addr=0x0d8000d8|bits=32|split=24|access=R}}

These registers operate identically to their HW_GPIO counterparts above, but they only control the pins which have their respective [[#HW_GPIO_OWNER|HW_GPIO_OWNER]] bits set to 1. They can be accessed by the Broadway as well as the Starlet. The master interrupt feeds to the [[Hardware/Hollywood IRQs|Hollywood GPIOB interrupt]] (#10). The generation logic would be HW_GPIOB_INTFLAG & HW_GPIOB_INTMASK, with an implicit AND with HW_GPIO_OWNER since the GPIOB registers are already masked with the HW_GPIO_OWNER register.

These registers operate identically to their HW_GPIO counterparts above, but they only control the pins which have their respective [[#HW_GPIO_OWNER|HW_GPIO_OWNER]] bits set to 1. They can be accessed by the Broadway as well as the Starlet. The master interrupt feeds to the [[Hardware/Hollywood IRQs|Hollywood GPIOB interrupt]] (#10). The generation logic would be HW_GPIOB_INTFLAG & HW_GPIOB_INTMASK, with an implicit AND with HW_GPIO_OWNER since the GPIOB registers are already masked with the HW_GPIO_OWNER register.

When switching owners, copying of the data is not necessary. For example, if pin 0 has certain configuration in the HW_GPIO registers, and that bit is then set in the HW_GPIO_OWNER register, those settings will immediately be visible in the HW_GPIOB registers. There is only one set of data registers, and the HW_GPIO_OWNER register just controls the access that the HW_GPIOB registers have to that data.

When switching owners, copying of the data is not necessary. For example, if pin 0 has certain configuration in the HW_GPIO registers, and that bit is then set in the HW_GPIO_OWNER register, those settings will immediately be visible in the HW_GPIOB registers. There is only one set of data registers, and the HW_GPIO_OWNER register just controls the access that the HW_GPIOB registers have to that data.