Hardware/GX/Blitting Processor

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BP (blitting processor) registers

The BP registers are accessed by writing a 8-bit value of 0x61 to the FIFO, followed by 32 bit value. This value is a bit weird - the high 8 bits are the register, and the low 24 bits are the register value.

EFB source registers

One can specify which part of the EFB is copied to the XFB or texture, using the following BP registers:

  • 0x49: coordinates to top left of rectangle in EFB that will be copied (packed format, unknown)
  • 0x4a: width and height-1 of rectangle to copy in EFB (again, unknown packed format)

XFB destination registers

The destination of the copy in the XFB is specified by the physical address of the XFB and the row stride (basically width of row, but no scaling appled).

Access R/W
  • 0x4b: Address of destination (XFB). BEWARE: You only have 24 bits, which means your XFB must reside somewhere in the low 16MiB of RAM.

  2310 90
Access U R/W
  • 0x4d: Low 10 bits specify row stride of destination.

Copy control register

  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Access U U
Field (register)
  15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Access U W R/W U
Field Begin copy Clear enable
  • 0x52: This register starts a copy. Important bits:
 * bit 10: Clear enable flag
 * bits 12-15: Set all to 1 to enable a copy.

Copy filter registers

Registers 0x01-0x04 are used for tricks like antialiasing. For a plain copy (i.e. no antialiasing) set all for to 0x666666.

Beginning a copy

The following must take place to do a copy:

  • Setup clear and z clear registers (optional)
  • Set source and destination registers
  • Write to display copy control register to begin a copy
  • Set clear, z, and control registers again (what? doubt necessary, libogc GX is stupid)