Difference between revisions of "Hardware"

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(Added information about the CPU and GPU.)
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===CPU===
 
===CPU===
 
* IBM '[[Broadway]]' 90 nm based on IBM's Power architecture.
 
* IBM '[[Broadway]]' 90 nm based on IBM's Power architecture.
*Runs at a speed of 729 Mhz. Maximum Bandwidth is 1.9 GB/s.
+
*Runs at a speed of 729 MHz. Maximum Bandwidth is 1.9 GB/s.
 
*Bus to main memory: 243 MHz, 64 bits (maximum bandwidth: 1.9 GB/s)
 
*Bus to main memory: 243 MHz, 64 bits (maximum bandwidth: 1.9 GB/s)
 
*32 KB 8-way set-associative L1 instruction cache
 
*32 KB 8-way set-associative L1 instruction cache
 
*32 KB 8-way set-associative L1 data cache (can set up 16-kilobyte data scratch pad)
 
*32 KB 8-way set-associative L1 data cache (can set up 16-kilobyte data scratch pad)
*Superscalar microprocessor with six execution units (floating-point unit, branching unit, system regis
+
*Superscalar microprocessor with six execution units (floating-point unit, branching unit, system register unit, load/store unit, two integer units)
ter unit, load/store unit, two integer units)
 
 
*DMA unit (15-entry DMA request queue) used by 16-kilobyte data scratch pad
 
*DMA unit (15-entry DMA request queue) used by 16-kilobyte data scratch pad
 
*Write-gather buffer for writing graphics command lists to the graphics chip
 
*Write-gather buffer for writing graphics command lists to the graphics chip
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*The FPU supports paired single multiply add (ps_madd). Most FP/PS instructions can be issued in  
 
*The FPU supports paired single multiply add (ps_madd). Most FP/PS instructions can be issued in  
 
each cycle and completed in three cycles.
 
each cycle and completed in three cycles.
*Fixed-point to floating-point conversion can be performed at the same time as FPU register load and  
+
*Fixed-point to floating-point conversion can be performed at the same time as FPU register load and store, with no loss in performance.
store, with no loss in performance.
 
 
*The branch unit supports static branch prediction and dynamic branch prediction.
 
*The branch unit supports static branch prediction and dynamic branch prediction.
*When an instruction is stalled on data, the next instruction can be issued and executed. All instructions  
+
*When an instruction is stalled on data, the next instruction can be issued and executed. All instructions maintain program logic and will complete in the correct program order.
maintain program logic and will complete in the correct program order.
 
 
*Supports three L2 cache fetch modes: 32-Byte, 64-Byte, and 128-Byte.
 
*Supports three L2 cache fetch modes: 32-Byte, 64-Byte, and 128-Byte.
 
*Supports these bus pipeline depth levels: level 2, level 3, and level 4.
 
*Supports these bus pipeline depth levels: level 2, level 3, and level 4.
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*Broadway CPU version is 87102, Gekko is 83410. Source: http://forum.wiibrew.org/viewtopic.php?t=210
 
*Broadway CPU version is 87102, Gekko is 83410. Source: http://forum.wiibrew.org/viewtopic.php?t=210
*information about its [[Broadway:Registers|registers]] is available
+
*Information about its [[Broadway:Registers|registers]] is available
  
 
===Graphics===
 
===Graphics===
 
* ATi '[[Hollywood]]' processor
 
* ATi '[[Hollywood]]' processor
*Runs at a  speed of 243 mhz.
+
*Runs at a  speed of 243 MHz.
 
Includes:
 
Includes:
*Graphics processing unit (with 3 megabytes of eDRAM)
+
*Graphics processing unit (with 3 MB of eDRAM)
 
*Audio DSP
 
*Audio DSP
 
*I/O Bridge
 
*I/O Bridge
*24 megabytes of internal main memory
+
*24 MB of internal main memory
 
*Internal main memory operates at 486 MHz.  
 
*Internal main memory operates at 486 MHz.  
Maximum bandwidth between Hollywood and internal main memory: 3.9 gigabytes per second
+
Maximum bandwidth between Hollywood and internal main memory: 3.9 GB/s
 
*Possible to locate a program here  
 
*Possible to locate a program here  
 
Reference Information: Hollywood is similar to Nintendo GameCube’s Flipper and Splash components.  
 
Reference Information: Hollywood is similar to Nintendo GameCube’s Flipper and Splash components.  
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===Optical Drive===
 
===Optical Drive===
* Supports single sided 4.7 GB and the double sided 8.51 GB. Nintendo GC discs also supported.
+
* Supports single sided 4.7 GB and double sided 8.51 GB discs. Nintendo GameCube discs are also supported.
  
 
===Wireless===
 
===Wireless===

Revision as of 14:20, 23 June 2008

CPU

  • IBM 'Broadway' 90 nm based on IBM's Power architecture.
  • Runs at a speed of 729 MHz. Maximum Bandwidth is 1.9 GB/s.
  • Bus to main memory: 243 MHz, 64 bits (maximum bandwidth: 1.9 GB/s)
  • 32 KB 8-way set-associative L1 instruction cache
  • 32 KB 8-way set-associative L1 data cache (can set up 16-kilobyte data scratch pad)
  • Superscalar microprocessor with six execution units (floating-point unit, branching unit, system register unit, load/store unit, two integer units)
  • DMA unit (15-entry DMA request queue) used by 16-kilobyte data scratch pad
  • Write-gather buffer for writing graphics command lists to the graphics chip
  • Onboard 256-kilobyte 2-way set-associative L2 integrated cache
  • Two, 32-bit integer units (IU)
  • One floating point unit (FPU) (supports single precision (32-bit) and double precision (64-bit))
  • The FPU supports paired single floating point (FP/PS)
  • The FPU supports paired single multiply add (ps_madd). Most FP/PS instructions can be issued in

each cycle and completed in three cycles.

  • Fixed-point to floating-point conversion can be performed at the same time as FPU register load and store, with no loss in performance.
  • The branch unit supports static branch prediction and dynamic branch prediction.
  • When an instruction is stalled on data, the next instruction can be issued and executed. All instructions maintain program logic and will complete in the correct program order.
  • Supports three L2 cache fetch modes: 32-Byte, 64-Byte, and 128-Byte.
  • Supports these bus pipeline depth levels: level 2, level 3, and level 4.

Reference Information: Broadway is upward compatible with Nintendo GameCube’s CPU (Gekko).

Graphics

  • ATi 'Hollywood' processor
  • Runs at a speed of 243 MHz.

Includes:

  • Graphics processing unit (with 3 MB of eDRAM)
  • Audio DSP
  • I/O Bridge
  • 24 MB of internal main memory
  • Internal main memory operates at 486 MHz.

Maximum bandwidth between Hollywood and internal main memory: 3.9 GB/s

  • Possible to locate a program here

Reference Information: Hollywood is similar to Nintendo GameCube’s Flipper and Splash components.

The Hollywood is a multi-chip package composed of two dies, named Vegas and Napa. Vegas is the GPU, and is also responsible for I/O functions, including memory access. Napa is the DSP, and includes 24 MiB of 1T RAM on the die. Vegas has direct access to 3 MiB of 1T RAM for use as a frame buffer and texture storage.

  • Qimonda HYB18HS1232 64 MiB GDDR3 graphics RAM

Memory

  • Elpida S1616AGTA 16-Mbit SDRAM
  • Samsung K9F4G08U0A 65-nm, 4-Gbit NAND flash
  • 64 MB of GDDR3 (MEM2) as the external main memory. Can be accessed from the CPU and GPU with a bandwidth of 4GB/s and can also store programs in the MEM2.

Optical Drive

  • Supports single sided 4.7 GB and double sided 8.51 GB discs. Nintendo GameCube discs are also supported.

Wireless

  • Broadcom BCM4318 Wi-Fi transceiver
  • Broadcom BCM2045 Bluetooth device connected via USB

References

  1. http://www.techonline.com/showArticle.jhtml?articleID=194500380
  2. http://techon.nikkeibp.co.jp/english/NEWS_EN/20061127/124495/