Hardware/Processor Interface
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This is an old revision of this page, as edited by Trap15 (talk | contribs) at 00:36, 12 July 2010. It may differ significantly from the current revision. |
Processor Interface | |
Access | |
---|---|
Broadway | Full |
Starlet | None |
Registers | |
Base | 0x0c003000 |
Length | 0x100 |
Access size | 32 bits |
Byte order | Big Endian |
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Interrupt Cause (0x0C003000)
IRQ | Description |
---|---|
0 | GP Runtime Error |
1 | Reset Switch |
2 | DVD |
3 | Serial |
4 | EXI |
5 | AI (Audio Interface) |
6 | DSP |
7 | MEM (Memory Interface) |
8 | VI (Video Interface) |
9 | PE Token |
10 | PE Finish |
11 | CP (Command Processor) FIFO |
12 | Debugger |
13 | Highspeed Port |
14 | Hollywood IRQs |
15 | Unused/reserved |
16 | Reset Switch State |
17-31 | Unused/reserved |
Interrupt Mask (0x0C003004)
IRQ | Description |
---|---|
0 | GP Runtime Error |
1 | Reset Switch |
2 | DVD |
3 | Serial |
4 | EXI |
5 | AI (Audio Interface) |
6 | DSP |
7 | MEM (Memory Interface) |
8 | VI (Video Interface) |
9 | PE Token |
10 | PE Finish |
11 | CP (Command Processor) FIFO |
12 | Debugger |
13 | Highspeed Port |
14 | Hollywood IRQs |
15-31 | Unused/reserved |
PI_FIFO_WP (0xCC003014) | |
310 | |
Access | R/W |