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== EXI boot code ==
== EXI boot code ==
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The Broadway boots from <code>fff00100</code>, which is where the [[Hardware/External Interface|EXI]] boot registers are mapped; there is space for 16 instructions, and they can be initialized by the Starlet by writing the instructions to <code>0d806840</code>.
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The Broadway boots from <code>fff00100</code>, which is mapped to the [[Hardware/External Interface#EXI boot vector|EXI's boot vector]]. this is initialized by the [[Starlet]] when bootstrapping the cpu
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IOS's function to initialize the EXI buffer has 2 default boot vectors depending on the parameters, but a custom boot vector is used by the <code>IOS_StartPPC</code> [[IOS/Syscalls|syscall]].
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=== Default vector (with HID4 initialization) ===
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<pre>
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fff00100 7c 63 1a 78 xor r3, r3, r3
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fff00104 64 63 d7 b0 oris r3, r3, 0xd7b0
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fff00108 7c 73 fb a6 mtspr HID4, r3
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fff0010c 4c 00 01 2c isync
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fff00110 3c 40 00 00 lis r2, 0x0
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fff00114 60 42 01 00 ori r2, r2, 0x100
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fff00118 7c 5a 03 a6 mtspr SRR0, r2
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fff0011c 38 a0 00 00 li r5, 0
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fff00120 7c bb 03 a6 mtspr SRR1, r5
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fff00124 4c 00 00 64 rfi
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fff00128 60 00 00 00 nop
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fff0012c 60 00 00 00 nop
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fff00130 60 00 00 00 nop
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</pre>
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=== Default vector (without HID4 initialization) ===
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<pre>
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fff00100 7c 63 1a 78 xor r3, r3, r3
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fff00104 7c 73 fb a6 mtspr HID4, r3
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fff00108 4c 00 01 2c isync
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fff0010c 3c 40 00 00 lis r2, 0
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fff00110 60 42 01 00 ori r2, r2, 0x100
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fff00114 7c 5a 03 a6 mtspr SRR0, r2
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fff00118 38 a0 00 00 li r5, 0
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fff0010c 7c bb 03 a6 mtspr SRR1, r5
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fff00120 4c 00 00 64 rfi
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fff00124 60 00 00 00 nop
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fff00128 60 00 00 00 nop
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fff0012c 60 00 00 00 nop
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</pre>
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=== IOS_StartPPC vector ===
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<pre>
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fff00100 3c 60 00 00 lis r3, 0
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fff00104 60 63 34 00 ori r3, r3, 0x3400
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fff00108 7c 7a 03 a6 mtspr SRR0, r3
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fff0010c 38 60 00 00 li r3, 0
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fff00110 7c 7b 03 a6 mtspr SRR1, r3
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fff00114 4c 00 00 64 rfi
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</pre>
[[Category:Official hardware]]
[[Category:Official hardware]]