Changes

2,896 bytes removed ,  23:42, 22 October 2008
Undo revision 30459 by Blooper4912 (Talk) Cache screwup
Line 3: Line 3:  
== Memory map ==
 
== Memory map ==
   −
{| style="border-collapse: collapse; padding: 0.2em 0.2em 0.2em 0.2em;"
+
{| class="wikitable"
|- style="background-color: #ddd;"
+
|-
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #ddd;" | '''Start Address'''
+
! Start Address
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #ddd;" | '''End Address'''
+
! End Address
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #ddd;" | '''Physical Address'''
+
! Physical Address
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #ddd;" | '''Size'''
+
! Size
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #ddd;" | '''Description'''
+
! Description
 
+
|-
|- style="background-color: #ddd;"
+
| 0x00000000
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x00000000
+
| 0x017FFFFF
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x017FFFFF
+
| 0x00000000
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x00000000
+
| 24 MB
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 24 MB
+
| MEM1 Memory (Cached)
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | MEM1 Memory (Cached)
+
|-
 
+
| 0x10000000
|- style="background-color: #ddd;"
+
| 0x13FFFFFF
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x10000000
+
| 0x10000000
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x13FFFFFF
+
| 64 MB
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x10000000
+
| MEM2 Memory (Cached)
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 64 MB
+
|-
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | MEM2 Memory (Cached)
+
| 0x0D000000
 
+
|  
|- style="background-color: #ddd;"
+
| 0x0D000000
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x0D000000
+
|  
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |
+
| Hardware Registers (shared with the Broadway)
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x0D000000
+
|-
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |  
+
| 0x0D400000
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | Hardware Registers (shared with the Broadway)
+
|  
 
+
| 0x0D400000
|- style="background-color: #ddd;"
+
|  
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x0D400000
+
| RAM used for program code, data and stack
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |
+
|-
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x0D400000
+
| 0x0D800000
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |  
+
|  
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | RAM used for program code, data and stack
+
| 0x0D800000
 
+
|  
|- style="background-color: #ddd;"
+
| Hardware Registers (Starlet private)
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x0D800000
+
|-
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |
+
| 0xFFFE0000
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0x0D800000
+
| 0xFFFFFFFF
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |  
+
|  
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | Hardware Registers (Starlet private)
+
|  
 
+
| Internal SRAM
|- style="background-color: #ddd;"
  −
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0xFFFE0000
  −
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | 0xFFFFFFFF
  −
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |  
  −
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" |  
  −
| style="border: 1px solid #ccc; padding: 0.2em; background-color: #dde;" | Internal SRAM
   
|}
 
|}
   Line 64: Line 58:  
== IO Memory ==
 
== IO Memory ==
   −
{| border=1
+
{| border="1"
| base      || function || offset || description || contents/example
+
! base      !! function !! offset !! description !! contents/example
 
|-
 
|-
 
|0x0D010000||NAND      ||  
 
|0x0D010000||NAND      ||  
2,375

edits