Line 816:
Line 816:
=== 0x89 Enable Cover Interrupt ===
=== 0x89 Enable Cover Interrupt ===
−
Disables the cover interrupt by clearing bit 1 of DICVR (leaving bit zero unchanged). Does not clear the cover interrupt if it is currently asserted (does not write bit 2).
+
Enables the cover interrupt by setting bit 1 of DICVR (leaving bit zero unchanged). Does not clear the cover interrupt if it is currently asserted (does not write bit 2).
The output buffer is not used, and it may be null. Its size is not checked.
The output buffer is not used, and it may be null. Its size is not checked.